BUILD-UP MULTILAYER WIRING BOARD AND MANUFACTURING METHOD THEREOF

PROBLEM TO BE SOLVED: To provide a reliable build-up multilayer wiring board in which no delamination can be generated at the surface layer of a ceramic wiring board, and to provide a method for manufacturing the build-up multilayer wiring board. SOLUTION: The build-up multilayer wiring board 7 comp...

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Bibliographische Detailangaben
Hauptverfasser: NISHIO FUMITAKA, KANBE ROKURO, ASANO TOSHIYA
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a reliable build-up multilayer wiring board in which no delamination can be generated at the surface layer of a ceramic wiring board, and to provide a method for manufacturing the build-up multilayer wiring board. SOLUTION: The build-up multilayer wiring board 7 comprises a low-temperature baked ceramic substrate 1; and a build-up layer 2 that has a structure in which a conductive layer 4 and a resin insulating layer 21 are laminated alternately, and is formed on at least one of a chip-packaging surface 18 and a ball grid junction surface 19 of the low-temperature baked ceramic substrate 1. The thermal coefficient of expansion in a direction for orthogonally crossing the thickness direction of the substrate of the low-temperature baked ceramic substrate 1 is equal to 7 ppm/°C or smaller. The thermal coefficient of expansion in a direction for orthogonally crossing the thickness direction of the substrate of the resin insulating layer 21 is equal to 40 ppm/°C or smaller. COPYRIGHT: (C)2005,JPO&NCIPI