DELAY-LOCKED LOOP CIRCUIT

PROBLEM TO BE SOLVED: To provide a delay-locked loop circuit capable of avoiding a harmonic lock state and a dead lock state. SOLUTION: The delay-locked loop circuit includes a phase frequency detector 100 which generates an up-signal and a down signal corresponding to the phases and the frequency differences between an input clock signal and a feedback signal; a charge pumping circuit 200; a loop filter 300; a voltage-controlled delay line 400 which delays the input clock signal to generate the feedback signal and control signals having phases different from each other; and a coarse lock detector 500 which receives the control signals, to generate an initialization signal and a coarse lock signal and controls the phase frequency detector and the charge pumping circuit, when the period of the input clock signal is defined as Tin and the delay time is defined as Td, to adjust Td within Tin/2