SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To efficiently reduce voltage drop due to wiring resistance in a chip and prevent malfunction due to power supply noise in a semiconductor device wherein a plurality of bonding pads in a semiconductor chip center part. SOLUTION: In the semiconductor device having a the semicond...

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Bibliographische Detailangaben
Hauptverfasser: MATSUSHIMA HIROTSUGU, YASUNAGA MASATOSHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To efficiently reduce voltage drop due to wiring resistance in a chip and prevent malfunction due to power supply noise in a semiconductor device wherein a plurality of bonding pads in a semiconductor chip center part. SOLUTION: In the semiconductor device having a the semiconductor chip, a peripheral pad arranged in the periphery of the semiconductor chip, and a center pad which is formed in a part except the peripheral pad of the semiconductor chip and supplies source, a plurality of the center pads are arranged in lattice form, and the center pads are interconnected by wire bonding. COPYRIGHT: (C)2005,JPO&NCIPI