MEMORY CIRCUIT

PROBLEM TO BE SOLVED: To provide a memory circuit having a writing circuit where sure data writing into a memory cell is guaranteed by a power voltage up to an extremely low voltage region. SOLUTION: The circuit is provided with the memory cell, a pair of bit lines which are connected to the memory cell and kept to HIGH levels at the time of non-writing, a word line which is connected to the memory cell and kept to a LOW level at the time of non-selection and the writing circuit connected to a pair of the bit lines. The writing circuit is over-driven to a negative voltage level from a positive voltage or a level close to it via a GND level when the bit lines are changed from the HIGH levels to the LOW levels. When data are written, a voltage of not less than the power voltage VDD is applied between a gate and a source of a cell selection FET in the memory cell, and conduction resistance can be reduced even by the power voltage of an extremely low voltage. COPYRIGHT: (C)2005,JPO&NCIPI