SEMICONDUCTOR WAFER AND ITS MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To provide a semiconductor wafer which can be reduced in copper contamination and lapping amount, and also to provide its manufacturing method. SOLUTION: Since an ingot I is sliced by a wire saw 10 equipped with a Zn-plated wire 11a, Cu contamination of silicon wafers obtained...

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1. Verfasser: HARADA SEISHI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a semiconductor wafer which can be reduced in copper contamination and lapping amount, and also to provide its manufacturing method. SOLUTION: Since an ingot I is sliced by a wire saw 10 equipped with a Zn-plated wire 11a, Cu contamination of silicon wafers obtained can be reduced. Consequently, a machining allowance in a lapping process can be more reduced than with a conventional brass-plated wire. With the zinc-plated wire, an attachment amount (holding power) of loose abrasive grains to the surface of the wire is increased, resulting in raising a cutting performance, cutting efficiency, and cutting accuracy with respect to a workpiece. Consequently, variations in thickness and warping of the silicon wafers can be suppressed while at the same time preventing the disconnection of the wire. COPYRIGHT: (C)2005,JPO&NCIPI