SYSTEM AND CONFIGURATION ENABLING PROGRAMMABLE INTEGRATIVE SYSTEM MARGIN TEST

PROBLEM TO BE SOLVED: To provide a system for a margin test of selected components and subsystems in electronic systems of computer systems. SOLUTION: The system comprises a base board management controller (BMC) inside an electronic system to be tested and a digital parameter adjuster communicating...

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Bibliographische Detailangaben
Hauptverfasser: CHHEDA SACHIN N, ROBERTSON NAYSEN JESSE, PERCER BENJAMIN THOMAS
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a system for a margin test of selected components and subsystems in electronic systems of computer systems. SOLUTION: The system comprises a base board management controller (BMC) inside an electronic system to be tested and a digital parameter adjuster communicating with the BMC for example through a bus of an I2C base. The digital parameter adjuster communicates with one or a plurality of components of the electronic system to be tested, and add operating parameters such as a clock frequency and voltage to the components. In addition, to obtain responses of the components corresponding to changes in the added operating parameters, the parameter adjuster sets the added parameters to one or a plurality of testing values in response to a command signal from the controller. COPYRIGHT: (C)2005,JPO&NCIPI