METHOD FOR PRODUCING INTEGRATED CIRCUIT DIE

PROBLEM TO BE SOLVED: To eliminate wire bonds required in prior art, and to provide an integrated circuit package while the integrated circuit is still in a wafer format. SOLUTION: A method that eliminates wire bonds required in prior art provides the integrated circuit package while the integrated...

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Bibliographische Detailangaben
Hauptverfasser: ANDERSON JAMES, GERSHON AKARLING
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To eliminate wire bonds required in prior art, and to provide an integrated circuit package while the integrated circuit is still in a wafer format. SOLUTION: A method that eliminates wire bonds required in prior art provides the integrated circuit package while the integrated circuit (62) is still in a wafer format. A wafer substrate on which the integrated circuits (62) have been fabricated is patterned and etched to form signal and ground vias (74, 72) through the substrate. A back-side ground plane (82) is deposited in contact with the ground vias (72). A protective layer (90) is formed on the top surface (76) of the substrate (64), and a protective layer (98) is formed on the bottom surface (84) of the substrate (64), where the bottom protective layer (98) fills in removed substrate material between the integrated circuits (62). Vias (106) are formed through the bottom protective layer (98), and the wafer substrate (64) is diced between the integrated. COPYRIGHT: (C)2005,JPO&NCIPI