METHOD OF PERFORMING MONTE CARLO SIMULATION TO PREDICT FAILURE IN SUPERPOSITION OF INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To provide a method of predicting failure in the superposition of circuit structures formed on adjacent layers through the lithography of a semiconductor wafer. SOLUTION: The present method includes: providing a designed structure of circuit sections to be formed on one or a plurality of adjacent layers of a semiconductor wafer through lithography; and predicting the shape and positioning of every circuit section on the each of the adjacent layers through the use of one or a plurality of predetermined values with regard to a process variation or a positioning deviation error. Further, the present method determines the superposed dimensions of predicted shapes and predicted positionings of the circuit sections, compares the determined superposed dimensions to the theoretical minimum values, and decides whether or not the predicted superposed dimensions are improper. The above-described steps are repeated regarding the provided designed structure using different values of process variations and positioning deviation errors, decides whether or not the predicted superposed dimensions are improper, and further a report of a measure of improperness is provided as an output. COPYRIGHT: (C)2005,JPO&NCIPI