WIRING BOARD
PROBLEM TO BE SOLVED: To provide a wiring board in which the effect of a parasitic capacitance between an electrode pad and a surface conductor can be reduced effectively even when the face conductor is arranged in flush with the electrode pad and thereby impedance matching in the entire signal tran...
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| creator | SUGIMOTO YASUHIRO HIGO ICHIEI |
| description | PROBLEM TO BE SOLVED: To provide a wiring board in which the effect of a parasitic capacitance between an electrode pad and a surface conductor can be reduced effectively even when the face conductor is arranged in flush with the electrode pad and thereby impedance matching in the entire signal transmission path can be realized easily. SOLUTION: In the wiring board 1, the surface conductor 17 is arranged directly under a second path end pad 20 through a directly under the dielectric layer V12. The main surface of the directly under dielectric layer V12 arranged with the second path end pad 20 is covered with a path end side surface conductor 19, and an opening 19a for second path end pad is formed at a position corresponding to a core side pad 18 of the path end side surface conductor 19. A second path end pad 20 is arranged on the inside of the opening 19a for second path end pad to form an annular path end pad gap 20c between the second path end pad 20 and the opening 19a for second path end pad. Width a of the path end pad gap is set larger than the thickness f of the directly under dielectric layer V12. COPYRIGHT: (C)2004,JPO&NCIPI |
| format | Patent |
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SOLUTION: In the wiring board 1, the surface conductor 17 is arranged directly under a second path end pad 20 through a directly under the dielectric layer V12. The main surface of the directly under dielectric layer V12 arranged with the second path end pad 20 is covered with a path end side surface conductor 19, and an opening 19a for second path end pad is formed at a position corresponding to a core side pad 18 of the path end side surface conductor 19. A second path end pad 20 is arranged on the inside of the opening 19a for second path end pad to form an annular path end pad gap 20c between the second path end pad 20 and the opening 19a for second path end pad. Width a of the path end pad gap is set larger than the thickness f of the directly under dielectric layer V12. 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SOLUTION: In the wiring board 1, the surface conductor 17 is arranged directly under a second path end pad 20 through a directly under the dielectric layer V12. The main surface of the directly under dielectric layer V12 arranged with the second path end pad 20 is covered with a path end side surface conductor 19, and an opening 19a for second path end pad is formed at a position corresponding to a core side pad 18 of the path end side surface conductor 19. A second path end pad 20 is arranged on the inside of the opening 19a for second path end pad to form an annular path end pad gap 20c between the second path end pad 20 and the opening 19a for second path end pad. Width a of the path end pad gap is set larger than the thickness f of the directly under dielectric layer V12. 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SOLUTION: In the wiring board 1, the surface conductor 17 is arranged directly under a second path end pad 20 through a directly under the dielectric layer V12. The main surface of the directly under dielectric layer V12 arranged with the second path end pad 20 is covered with a path end side surface conductor 19, and an opening 19a for second path end pad is formed at a position corresponding to a core side pad 18 of the path end side surface conductor 19. A second path end pad 20 is arranged on the inside of the opening 19a for second path end pad to form an annular path end pad gap 20c between the second path end pad 20 and the opening 19a for second path end pad. Width a of the path end pad gap is set larger than the thickness f of the directly under dielectric layer V12. COPYRIGHT: (C)2004,JPO&NCIPI</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES |
| title | WIRING BOARD |
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