CHARGE PUMP CIRCUIT

PROBLEM TO BE SOLVED: To provide a charge pump circuit which can more reduce the area of a used capacitor than a conventional one. SOLUTION: When an input terminal 101 comes to voltage 0, the output voltage of a pulse booster circuit 102 becomes 0, and a capacitor 106 is charged with power voltage V...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MATOBA SHINJI, CHIN GIYOUSHIYOU, ASANO MASAMICHI, OKAMURA SHUJI, TOKUNAGA TOMOSHI
Format: Patent
Sprache:eng
Schlagworte:
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a charge pump circuit which can more reduce the area of a used capacitor than a conventional one. SOLUTION: When an input terminal 101 comes to voltage 0, the output voltage of a pulse booster circuit 102 becomes 0, and a capacitor 106 is charged with power voltage Vcc via an FET110. But, the forward drop voltage of the FET is ignored. Next, when the input terminal 101 comes to voltage Vcc, the output voltage of the pulse booster circuit 102 comes to voltage 2Vcc, and the voltage at a point C1 becomes 3Vcc. Moreover, the voltage of an inverter 103 becomes 0, and the output voltage of the pulse booster circuit 104 becomes 0. As a result, a capacitor 107 is charged with voltage 3Vcc. Next, when the input terminal 101 comes to voltage 0, the output of the inverter 103 comes to voltage Vcc, the output voltage of the pulse booster circuit 104 becomes 2Vcc, and the voltage at a point C2 becomes 5Vcc. The voltage of this point C2 is outputted through an FET112. COPYRIGHT: (C)2004,JPO&NCIPI