SEMICONDUCTOR STORAGE DEVICE

PROBLEM TO BE SOLVED: To provide a semiconductor storage device capable of increasing the utilization rate and the data transfer rate of a common data bus in a multibank DRAM and realizing the high speed of data access without increasing the size of a control circuit. SOLUTION: A multibank DRAM is provided with an address register 250 for holding a write address in each memory bank, a data register 290 for holding writing data, and an address coincidence detection circuit 270 for detecting the coincidence of the address held in the address register with a currently input address. When reading subsequent to writing is performed in the same address of the same memory bank, the data held in the data register are output as reading data without reading from a memory cell specified by the reading address. Thus, a high speed is achieved for continuous memory access to the same address. COPYRIGHT: (C)2004,JPO&NCIPI