AUTOMATIC SELECTION AND ARRANGEMENT OF MEMORY IN DESIGN OF INTEGRATED CIRCUIT
PROBLEM TO BE SOLVED: To provide a tool for generating an exact and optimum memory set on an integrated circuit from combination of memory structure automatically created from usable spreading and/or a logic array. SOLUTION: When a slice having many blocks which are already spread and logically inte...
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| creator | NATION GEORGE W DELP GARY S REULAND PAUL G |
| description | PROBLEM TO BE SOLVED: To provide a tool for generating an exact and optimum memory set on an integrated circuit from combination of memory structure automatically created from usable spreading and/or a logic array. SOLUTION: When a slice having many blocks which are already spread and logically integrated is provided, a memory generation tool (330) by this invention is optimized so as to be suitable for requirements of a memory of a customer in consideration of a usable spreading memory and a gate array of the slice. The memory generation tool (330) has a memory manager (332), a memory resource database (334), a memory resource selector (336) and a memory composer (338). A memory conforming to design is generated from a usable memory in the memory resource database (334) by functions of the components. COPYRIGHT: (C)2004,JPO&NCIPI |
| format | Patent |
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| subjects | BASIC ELECTRIC ELEMENTS CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY PHYSICS SEMICONDUCTOR DEVICES |
| title | AUTOMATIC SELECTION AND ARRANGEMENT OF MEMORY IN DESIGN OF INTEGRATED CIRCUIT |
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