SEMICONDUCTOR DEVICE, DATA RETRIEVAL CIRCUIT, METHOD OF READING MEMORY CELL ARRAY, AND METHOD OF RETRIEVING DATA

PROBLEM TO BE SOLVED: To provide the data output circuit of a double data rate synchronous semiconductor device. SOLUTION: The data output circuit of a DDR (double data rate) synchronous semiconductor device is provided with a first pipeline stage, a second pipeline stage, a multiplexing means, and...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: YU SHOSHOKU, HEO NAK-WON
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide the data output circuit of a double data rate synchronous semiconductor device. SOLUTION: The data output circuit of a DDR (double data rate) synchronous semiconductor device is provided with a first pipeline stage, a second pipeline stage, a multiplexing means, and an output data buffer. The switching part of the first pipeline stage inputs even-number and odd-number data read in parallel from a memory cell to even-number and odd-number data latches. The switching part of the second pipeline stage output an even-number data 1 bit from the even-number data latch and an odd-number data 1 bit from the odd-number data latch in parallel to latch them. The multiplexing means receives 2-bit even-number and odd-number data output in parallel from the latch of the second pipeline stage, and converts the data into 2-bit serial data, i.e., DDR data, during one clock cycle to output it. COPYRIGHT: (C)2004,JPO