DESIGN METHOD, DESIGN SYSTEM, RECORDING MEDIUM, PROGRAM, AND SEMICONDUCTOR INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To realize a chip of a smaller size in a shorter period in fewer processes. SOLUTION: At step S21, a layout design program determines the layout of units, e.g. cells, on a semiconductor integrated circuit where the total sum of areas of the terminals of a semiconductor element...

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Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To realize a chip of a smaller size in a shorter period in fewer processes. SOLUTION: At step S21, a layout design program determines the layout of units, e.g. cells, on a semiconductor integrated circuit where the total sum of areas of the terminals of a semiconductor element connected with an input terminal, e.g. the gate of a transistor, and connected with a semiconductor through a thin film of an insulator is not smaller than a minimum value calculated from the maximum length of routing a semiconductor integrated circuit and the antenna ratio. At step S22, the layout design program determines the route having a length not longer than the maximum value and connecting the input terminal of a unit. The invention is applicable to a system for designing a semiconductor integrated circuit. COPYRIGHT: (C)2004,JPO