INFORMATION PROCESSING APPARATUS

PROBLEM TO BE SOLVED: To provide a bus system for an information processing apparatus for maximizing usage efficiency of each bus of three kinds of a system bus, a memory bus and a processor bus. SOLUTION: The processor bus 111 connected with a processor 101, the memory bus 112 connected with a main...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MOCHIDA TETSUYA, KAWAGUCHI HITOSHI, KOBAYASHI ICHIJI, KIMURA KOICHI, OKAZAWA KOICHI, YUNO KAZUHARU
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a bus system for an information processing apparatus for maximizing usage efficiency of each bus of three kinds of a system bus, a memory bus and a processor bus. SOLUTION: The processor bus 111 connected with a processor 101, the memory bus 112 connected with a main memory 104 and the system bus 113 connected with an input/output device 105 are connected to a trident path connection control means 103. The control means 103 has a bus-memory connection controller 401, with which each address bus of the processor bus, the memory bus and the system bus, and a control bus are connected together to transmit mutually addresses and control signals, and which generate data bus control signals. The control means 103 also has a data path switch, with which each data bus of the processor bus 111, the memory bus 112 and the system bus 113 is connected to transfer mutually data on the data buses according to the data bus control signals. COPYRIGHT: (C)2004,JPO