BUILT-IN SELF-TEST CIRCUIT

PROBLEM TO BE SOLVED: To facilitate the narrowing-down of suspected scan paths and failure observation timing which are required at failure diagnosis in a semiconductor integrated circuit using a built-in self-test circuit. SOLUTION: A test pattern is supplied to a plurality of scan paths 21-29 from a pattern generator 1. Output responses are stored in output response compressors. By comparing stored values with expected values, failures are detected in this BIST type built-in self-test circuit in the semiconductor integrated circuit. The output response compressors are constituted of a plurality of output response compressors 4a-4c for storing the output responses from the plurality of scan paths 21-29 in a state divided into a plurality of groups. By a scan path electing circuit 3 interposed between the suspected scan paths and the output response compressors 4a-4c, the state of connection between the plurality of scan paths and the plurality of output response compressors is switched. COPYRIGHT: (C)2004,JPO