HIGH VOLTAGE VERTICAL TYPE DMOS TRANSISTOR, AND METHOD FOR PRODUCING THE SAME

PROBLEM TO BE SOLVED: To provide a method and a structure in which the vertical type DMOS as a typical high voltage operation transistor is effectively subjected to element separation, and at the same time, drain-source on-resistance is decreased. SOLUTION: A buried layer is formed on a semiconducto...

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Bibliographische Detailangaben
Hauptverfasser: LEE SOOOL, SHIN WAJO
Format: Patent
Sprache:eng
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