NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND ITS MANUFACTURE

PROBLEM TO BE SOLVED: To reduce manufacturing cost by enhancing a common feature of a structure involving a memory transistor and a memory peripheral circuit. SOLUTION: A plurality of insulated gate transistors consisting the memory peripheral circuit and the memory transistor (formation region 10c)...

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Bibliographische Detailangaben
Hauptverfasser: NOMOTO KAZUMASA, KOBAYASHI TOSHIO, TOMIYA HIDETO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To reduce manufacturing cost by enhancing a common feature of a structure involving a memory transistor and a memory peripheral circuit. SOLUTION: A plurality of insulated gate transistors consisting the memory peripheral circuit and the memory transistor (formation region 10c) are formed on a single semiconductor substrate 10. The memory transistor is formed between the substrate 10 and a gate electrode 25 provided with a plurality of stacked films (charge storage film 14m) comprising therein a discrete charge storage means (charge trap) which is charged when storing or eliminating information. Among the plurality of insulated gate transistors, at least a gate insulating film 14 which is formed between the substrate 10 and a gate electrode 23 or 24 and belongs to a high voltage transistor (formation region 10b) having the highest voltage in the memory peripheral circuit, has the same structure (three layers 14a-14c) as the charge storage film 14m. COPYRIGHT: (C)2004,JPO