SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To achieve stable working and realize reduction of working irregularity on a manufacturing process by ensuring area ratio and peripheral length of a dummy pattern of a wiring system and arranging a dummy pattern of a contact hole. SOLUTION: A mesh type (hole type) dummy pattern...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HIRANO HIROSHIGE, SAKAGAMI MASAHIKO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To achieve stable working and realize reduction of working irregularity on a manufacturing process by ensuring area ratio and peripheral length of a dummy pattern of a wiring system and arranging a dummy pattern of a contact hole. SOLUTION: A mesh type (hole type) dummy pattern is used as the wiring system dummy pattern, and the area ratio and the peripheral length which are necessary in small area are maintained. The wiring system first dummy pattern 2a of a first wiring layer, the wiring system second dummy pattern 4a of a second wiring layer, and the dummy pattern 5 of the contact hole which connects the first and the second dummy patterns, are arranged, so that working irregularity on a manufacturing process is reduced. Separation of a usual pattern and the dummy pattern is made greater than the minimum separation of the usual pattern, so that wiring capacity is reduced. COPYRIGHT: (C)2004,JPO