DYNAMIC SEMICONDUCTOR MEMORY DEVICE

PROBLEM TO BE SOLVED: To provide a dynamic semiconductor memory device capable of reducing a wasteful refresh current. SOLUTION: The DRAM is provided with: a cell array 1 wherein DRAM cells which are driven by word lines and exchange data with bit lines are arranged; a row decoder 3 and column decoder 4 for selecting the word lines and the bit lines of the cell array 1; a sense amplifier 2 for amplifying data of the bit lines of the cell array 1; and also has a refresh control circuit allowing refreshing limited to externally accessed areas. The refresh control circuit is provided with: a refresh counter 7 that produces an internal address signal sequentially incremented for refreshing the cell array 1; registers 10 provided to each of a plurality of areas of the cell arrays 1 to latch information denoting the presence/absence of access to the area; and a refresh limit circuit 3 for inhibiting refreshing of the not-accessed-areas of the cell array 1 on the basis of the information in the registers 10. COPYRIGHT: (C)2004,JPO