SEMICONDUCTOR DEVICE AND ITS FABRICATING PROCESS

PROBLEM TO BE SOLVED: To obtain a semiconductor device in which signal delay can be suppressed and diffusion of a barrier metal into an interlayer dielectric being formed with a contact hole having a high aspect ratio is reduced. SOLUTION: Since the interlayer dielectric being formed with a groove f...

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Bibliographische Detailangaben
Hauptverfasser: OTORII SUGURU, NOGAMI TAKESHI, TAI KAORI, TAKAHASHI SHINGO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To obtain a semiconductor device in which signal delay can be suppressed and diffusion of a barrier metal into an interlayer dielectric being formed with a contact hole having a high aspect ratio is reduced. SOLUTION: Since the interlayer dielectric being formed with a groove for forming an interconnect and a contact hole having a relatively high aspect ratio for the groove has a multilayer structure composed of a porous low permittivity material and a nonporous low permittivity material, diffusion of the barrier metal into the interlayer dielectric being formed with the contact hole is reduced. In the semiconductor device having an interconnect and an interlayer connecting line being formed collectively by filling the groove and the interlayer contact hole with a conductive material, signal delay is suppressed and the reliability is enhanced. COPYRIGHT: (C)2004,JPO