PULSE WIDTH RESTRICTION CIRCUIT FOR PWM SIGNAL

PROBLEM TO BE SOLVED: To provide a pulse width restriction circuit of a PWM signal which can prevent a signal having an extremely small pulse width from being impressed for input to a driver or the like, and can easily generate two PWM signals having different on/off timings. SOLUTION: It is charact...

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Hauptverfasser: TSUBOUCHI KOSUKE, KINOSHITA OSAMU
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a pulse width restriction circuit of a PWM signal which can prevent a signal having an extremely small pulse width from being impressed for input to a driver or the like, and can easily generate two PWM signals having different on/off timings. SOLUTION: It is characterized in that time constant circuits 12, 13 which generate from a first signal SG11 inputted as a PWM signal, a second signal SG12 having more moderate gradient in a rise and fall than that of the SG11; and a gate circuit 14 which has a hysteresis property in a threshold value to discriminate input signal levels, and outputs a third signal SG13 delayed of the second signal SG 12 outputted from the constant number circuit; are provided. COPYRIGHT: (C)2003,JPO