SEMICONDUCTOR MEMORY

PROBLEM TO BE SOLVED: To provide a means in which read-out data is outputted to an external circuit at high speed and power consumption at read-out operation can be reduced. SOLUTION: When a potential of an inverse data line DLB is lowered to threshold voltage Vtp of MP (pMOS transistor) 4 or more in reading out data '1' from a memory cell, the MP4 is turned on, a MP3 is turned off, RLB out of a pair of data lines (RL, RLB) is fixed to 'L' as it is, and RL is raised. In an input buffer circuit 31, gates of the MP1 and the MP2 are connected mutually drains of the opposite side and a F/F circuit is formed, when data '1' is read on and a potential of DLB is lowered to threshold voltage Vtp of the MP1 or more, the MP1 for writing original data is turned on, the circuit is operated so that the data line D1 is fixed to 'H', turning on of the MP3 of a level converting circuit 33 is prevented, the MP4 is turned on at higher speed. COPYRIGHT: (C)2003,JPO