SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To obtain a semiconductor device comprising a bipolar transistor in which parasitic capacitance can be eliminated between a passive element and a low resistance epitaxial growth layer without causing the problem of level difference. SOLUTION: The semiconductor device comprises...

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1. Verfasser: YONEDA KIWA
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To obtain a semiconductor device comprising a bipolar transistor in which parasitic capacitance can be eliminated between a passive element and a low resistance epitaxial growth layer without causing the problem of level difference. SOLUTION: The semiconductor device comprises a semiconductor substrate, i.e., a silicon substrate 1, including a first region 91 and a second region 92 defined in a plane, a first layer, i.e., a high resistance epitaxial growth layer 53, formed on the major surface, and a second layer, i.e., a low resistance epitaxial growth layer 54, having a resistivity lower than that of the first layer formed on the upper side of the first layer. A bipolar transistor is included in the first region 91 and an passive element is included in the second region arranged to cover the first region while avoiding at least a part of the second region. COPYRIGHT: (C)2003,JPO