METHOD AND APPARATUS FOR INSPECTING SEMICONDUCTOR INTEGRATED CIRCUIT

METHOD AND APPARATUS FOR INSPECTING SEMICONDUCTOR INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To allow the burn-in by a burn-in apparatus to be omitted to simplify the manufacturing process of a semiconductor integrated circuit. SOLUTION: Prior to the function inspection of a semiconductor integrated circuit with test signals applied to the integrated circuit, a signal...

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Bibliographische Detailangaben
Hauptverfasser: SHIRAISHI CHIAKI, KIMOTO TAKUYA
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
SEMICONDUCTOR DEVICES
TESTING
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To allow the burn-in by a burn-in apparatus to be omitted to simplify the manufacturing process of a semiconductor integrated circuit. SOLUTION: Prior to the function inspection of a semiconductor integrated circuit with test signals applied to the integrated circuit, a signal for giving a higher load to the integrated circuit than in its usual operation is applied thereto under a normal temperature condition.