METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To solve the problem that reliability in a semiconductor device having a MISFET of a trench gate structure is lowered. SOLUTION: In a method for manufacturing a semiconductor device having a MISFET of a trench gate structure, a groove 4 is formed of a main plane of a first cond...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: KUBO SAKAE, IMAI YASUO, KOBAYASHI MASAYOSHI, SHIGEMATSU TAKU, ONISHI AKIHIRO, OISHI KENTARO, KUDO SATOSHI, NAKAZAWA YOSHITO, NUMAZAWA SUMUTO, UESAWA KOUZOU
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To solve the problem that reliability in a semiconductor device having a MISFET of a trench gate structure is lowered. SOLUTION: In a method for manufacturing a semiconductor device having a MISFET of a trench gate structure, a groove 4 is formed of a main plane of a first conductive type semiconductor layer 1B as a drain area to the depth direction thereof, and a gate insulating film 5 composed of a thermal oxide film 5A and a deposited film 5B on the internal plane of the groove 4 is formed, and a gate electrode 6A is formed in the groove 4. Thereafter, impurities are introduced into the first conductive type semiconductor layer 1B to form a second conductive type semiconductor area 8 as a channel forming area, and impurities are introduced into the second conductive type semiconductor area 8 to form a first conductive type semiconductor area 9 as a source area.