PLL CIRCUIT

PROBLEM TO BE SOLVED: To suppress a wander and a jitter without a phase ripple of output clock by enabling the frequency at look to be maintained even if abnormality such as break, etc., occurs in an input clock. SOLUTION: A fundamental circuit for phase preservation is composed of a phase comparato...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	TERAJIMA HISAE, UEDA HIROYUKI
Format:	Patent
Sprache:	eng
Schlagworte:	AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY ELECTRICITY
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