SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To solve such a problem that area, power consumption, and an access time are increased by an ECC (error correct codes) circuit for correcting an error. SOLUTION: This device is provided with a plurality of memory mats, a local bus formed in parallel to the direction of word lin...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HARADA MASAKI, KIJIMA TAKEHIKO, OSADA KENICHI, ISHIBASHI KOICHIRO, SAITO YOSHIKAZU
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To solve such a problem that area, power consumption, and an access time are increased by an ECC (error correct codes) circuit for correcting an error. SOLUTION: This device is provided with a plurality of memory mats, a local bus formed in parallel to the direction of word line and transferring read- out data and write-in data of a memory cell, a global bus for write-in, being parallel to the data line and transferring write-in data from an output pad IO, a global bus for read-out, being parallel to the data line and transferring read-out data from an input pad IO, and at least one or more error correcting circuit positioned at intersections of the global bus and the local bus. Read-out and write-in are finished in one cycle, write-in operation of data having a value being different from data read out once at the time of write-in operation is performed.