WIRING CAPACITY MEASUREMENT CIRCUIT AND METHOD

PROBLEM TO BE SOLVED: To provide a wiring capacity measurement circuit for reducing circuit scale and costs and to provide a simple wiring capacity measurement method. SOLUTION: The wiring capacity measurement circuit comprises a first unloaded clocked inverter CIV1, a second clocked inverter CIV2 w...

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Bibliographische Detailangaben
Hauptverfasser: INOUE TAKESHI, TAKATORI NOZOMI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a wiring capacity measurement circuit for reducing circuit scale and costs and to provide a simple wiring capacity measurement method. SOLUTION: The wiring capacity measurement circuit comprises a first unloaded clocked inverter CIV1, a second clocked inverter CIV2 where an input node is shared with the input node of the first clocked inverter CIV1 and wiring 3 is connected to an output node, a delay circuit 12 that delays a pulse signal SV to be supplied to a common input node by specific time for supplying to the clock gates of the first and second clocked inverters CIV1 and CIV2, and ammeters A1 and A2 for measuring the level of a current that flows to the first and second clocked inverters CIV1 and CIV2 when a pulse signal SV is supplied to the common input node.