SEMICONDUCTOR MEMORY

PROBLEM TO BE SOLVED: To provide a semiconductor memory in which power consumption is reduced and a circuit scale is small. SOLUTION: An address generating circuit 4 of a DRAM comprises five fuses 63, a trimming switching circuit 42 generating signals 0- 4 depending on whether each fuse 63 is blown or not, a voltage converting circuit 43 generating control voltage VB of a level corresponding to signals 0- 4, a voltage control oscillating circuit 44 generating a clock signal CLK having a period corresponding to the control voltage VB, and an address counter 45 generating address signals A0-A11 in synchronism with a clock signal CLK. Therefore, as a plurality of count circuits 156-160 and a detecting circuit 161 are not used, so that power consumption and circuit scale may be less.