METHOD OF FAULT ISOLATION OF DIGITAL ELECTRONIC UNIT

METHOD OF FAULT ISOLATION OF DIGITAL ELECTRONIC UNIT

PROBLEM TO BE SOLVED: To reduce a cost, and to enhance the probability of fault detection. SOLUTION: This fault isolation method includes a step for attaching a probe to at least one pin out of respective sub-circuits 32-38 in a digital electronic unit 10. A predetermined stimulation 20 is transmitt...

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Bibliographische Detailangaben
Hauptverfasser: LINK BRUCE A, PETRUCCELLI GREGORY D, HADGIS GEORGE A
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
PULSE TECHNIQUE
TESTING
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To reduce a cost, and to enhance the probability of fault detection. SOLUTION: This fault isolation method includes a step for attaching a probe to at least one pin out of respective sub-circuits 32-38 in a digital electronic unit 10. A predetermined stimulation 20 is transmitted to the electronic device, and changes from 0 to 1 in the respective probes are counted to obtain the first summation. Changes from 1 to 0 in the respective probes are counted to obtain the second summation. The first summation and the second summation are compared with a predetermined reference to determine a sub-set of the sub-circuit not conformed to the predetermined reference. The sub-circuit is confirmed based on the sub-set not conformed to the predetermined reference and nearest to the predetermined stimulation 20 in signal progress.