FEOL CAPACITOR AND ITS MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To provide an FEOL capacitor such as a polysilicon-polysilicon capacitor and an MIS capacitor wherein high permittivity (high-k) dielectrics whose permittivity k is higher than about 8 can be assembled in a capacitor structure, and a method for manufacturing the FEOL capacitor....

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Hauptverfasser: OKORN-SCHMIDT HARALD F, BUCHANAN DOUGLAS A, BALLANTINE ARNE W, CARTIER EDUARD A, COOLBAUGH DOUGLAS D, GOUSEV EVGENI P
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide an FEOL capacitor such as a polysilicon-polysilicon capacitor and an MIS capacitor wherein high permittivity (high-k) dielectrics whose permittivity k is higher than about 8 can be assembled in a capacitor structure, and a method for manufacturing the FEOL capacitor. SOLUTION: First, a lower electrode 12 is formed in an Si containing substrate 10 by using ion implantation. The high permittivity dielectrics 14 whose permittivity k is higher than about 8 is formed on at least a part of the lower electrode 12. A doped Si containing electrode 16 of a bipolar device constituted of an intrinsic base polysilicon layer is formed on the high permittivity dielectrics 14. By performing the above processes, an MIS capacitor can be obtained. By the method, the FEOL capacitor wherein the upper and the lower electrode in which series resistance is small are formed, capacitance per unit area is large, and high frequency response characteristic is superior can be obtained. Further, chip size can be reduced remarkably, and especially in the use of an analog signal and a mixed signal in which a capacitor of large area is used, chip size can be reduced remarkably.