MEMORY CONTROLLER

PROBLEM TO BE SOLVED: To provide a memory controller capable of improving the processing performance of a computer system by accelerating reading and writing to/from a memory with a simple and inexpensive configuration. SOLUTION: The memory controller, for receiving a memory access signal generated...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: SHICHIJO SHUNICHI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a memory controller capable of improving the processing performance of a computer system by accelerating reading and writing to/from a memory with a simple and inexpensive configuration. SOLUTION: The memory controller, for receiving a memory access signal generated from a CPU and controlling data input and output to/from a main storage, has an address holding part holding address information of a particular area in a logic address space of a main storage means, an address rearranging part for rearranging the particular area in a high-speed memory that can be accessed faster than the real memory of the main storage means can, and an address comparing part for comparing the address of a memory access signal generated from the CPU with address information. The memory controller accesses the high-speed memory where the particular area is rearranged in the case the address of the memory access signal generated from the CPU is within an area shown by the address information.