BIAS CIRCUIT

BIAS CIRCUIT

PROBLEM TO BE SOLVED: To suppress intermodulated components. SOLUTION: The bias circuit of FETs (or bipolar transistors) Q1 and Q2 comprises: a notch filter composed of two inductors of an inductance L and a one-terminal grounded capacitor of capacitance 2C; and a one-side power feeding circuit from...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: ITO AKIRA, YAMASHITA TESSHIN, OGUCHI NOBUTAKA
Format: Patent
Sprache:eng
Schlagworte:
AMPLIFIERS
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
WAVEGUIDES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To suppress intermodulated components. SOLUTION: The bias circuit of FETs (or bipolar transistors) Q1 and Q2 comprises: a notch filter composed of two inductors of an inductance L and a one-terminal grounded capacitor of capacitance 2C; and a one-side power feeding circuit from a bias power supply VG, etc. The blocking frequency of the notch filter is set at a difference frequency Δf of an input signal component.