SEMICONDUCTOR MEMORY

PROBLEM TO BE SOLVED: To provide a semiconductor memory in which scale of a data output circuit is reduced and data read-out rate is improved. SOLUTION: An output control signal generating section 201 receives a first output data deciding signal D outputted by a sense amplifier, a second output data deciding signal /D, and a level shift enable-signal EN- Vext. Logic levels of the first output data deciding signal D the second output data deciding signal /D are in complementary relation, the maximum voltage is internal voltage Vint and the minimum voltage is ground voltage GND in both. An output section 202 connected to the output control signal generating section 201 through a node n/P and a node n/N outputs an output signal DOUT from a node n232. The maximum voltage of the output signal DOUT is external voltage Vext and the minimum voltage is ground voltage GND.