MEMORY SYSTEM HAVING PTP BUS CONSTITUTION

PROBLEM TO BE SOLVED: To provide clocking system/method having PTP bus structure. SOLUTION: The same phase relation is guaranteed on a writing clock signal from a writing direction for the various transmissions of data between modules, and the same phase relation is supplied to a reading clock from a reading direction for the various transmissions of data between the modules irrespective of a module position in one performing form. In the other performing form, the various transmissions of data between a data buffer and a memory device on the modules given from the writing/reading directions are clocked by the reading clock signals and writing clock signals, which have the same phase relation and same transmission delay as a data bus, between the data buffer and the memory device.