DIGITAL CIRCUIT DEVICE, AND METHOD OF TESTING SEMICONDUCTOR DEVICE
PROBLEM TO BE SOLVED: To precisely conduct clock distribution even when delay time fluctuation is generated cauded by fluctuation of a device operation condition, in a digital circuit device. SOLUTION: In this digital circuit device, the delay time fluctuation accompanied to the fluctuation of the d...
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creator | INUDOU KOUSUKE HAYASHI YOSHIHIKO ORIHASHI RITSURO |
description | PROBLEM TO BE SOLVED: To precisely conduct clock distribution even when delay time fluctuation is generated cauded by fluctuation of a device operation condition, in a digital circuit device. SOLUTION: In this digital circuit device, the delay time fluctuation accompanied to the fluctuation of the device operation condition is corrected by circuit parts 10A-10C for measuring delay times in delay circuits 1A-1C for phase shift regulation, operation circuits B (11A-C) for computing fluctuation ratios based on measured values, and operation circuits A (12A-C) provided in the respective delay circuits to calculate fluctuation amounts based on the fluctuation ratios. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2002267725A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2002267725A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2002267725A3</originalsourceid><addsrcrecordid>eNrjZHBy8XT3DHH0UXD2DHIO9QxRcHEN83R21VFw9HNR8HUN8fB3UfB3UwhxDQ7x9HNXCHb19XT293MJdQ7xD4Kq5WFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8V4BRgYGRkZm5uZGpo7GRCkCAC7UK2I</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>DIGITAL CIRCUIT DEVICE, AND METHOD OF TESTING SEMICONDUCTOR DEVICE</title><source>esp@cenet</source><creator>INUDOU KOUSUKE ; HAYASHI YOSHIHIKO ; ORIHASHI RITSURO</creator><creatorcontrib>INUDOU KOUSUKE ; HAYASHI YOSHIHIKO ; ORIHASHI RITSURO</creatorcontrib><description>PROBLEM TO BE SOLVED: To precisely conduct clock distribution even when delay time fluctuation is generated cauded by fluctuation of a device operation condition, in a digital circuit device. SOLUTION: In this digital circuit device, the delay time fluctuation accompanied to the fluctuation of the device operation condition is corrected by circuit parts 10A-10C for measuring delay times in delay circuits 1A-1C for phase shift regulation, operation circuits B (11A-C) for computing fluctuation ratios based on measured values, and operation circuits A (12A-C) provided in the respective delay circuits to calculate fluctuation amounts based on the fluctuation ratios.</description><edition>7</edition><language>eng</language><subject>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES ; BASIC ELECTRONIC CIRCUITRY ; CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; PULSE TECHNIQUE ; TESTING</subject><creationdate>2002</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020918&DB=EPODOC&CC=JP&NR=2002267725A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020918&DB=EPODOC&CC=JP&NR=2002267725A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>INUDOU KOUSUKE</creatorcontrib><creatorcontrib>HAYASHI YOSHIHIKO</creatorcontrib><creatorcontrib>ORIHASHI RITSURO</creatorcontrib><title>DIGITAL CIRCUIT DEVICE, AND METHOD OF TESTING SEMICONDUCTOR DEVICE</title><description>PROBLEM TO BE SOLVED: To precisely conduct clock distribution even when delay time fluctuation is generated cauded by fluctuation of a device operation condition, in a digital circuit device. SOLUTION: In this digital circuit device, the delay time fluctuation accompanied to the fluctuation of the device operation condition is corrected by circuit parts 10A-10C for measuring delay times in delay circuits 1A-1C for phase shift regulation, operation circuits B (11A-C) for computing fluctuation ratios based on measured values, and operation circuits A (12A-C) provided in the respective delay circuits to calculate fluctuation amounts based on the fluctuation ratios.</description><subject>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>PULSE TECHNIQUE</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2002</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHBy8XT3DHH0UXD2DHIO9QxRcHEN83R21VFw9HNR8HUN8fB3UfB3UwhxDQ7x9HNXCHb19XT293MJdQ7xD4Kq5WFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8V4BRgYGRkZm5uZGpo7GRCkCAC7UK2I</recordid><startdate>20020918</startdate><enddate>20020918</enddate><creator>INUDOU KOUSUKE</creator><creator>HAYASHI YOSHIHIKO</creator><creator>ORIHASHI RITSURO</creator><scope>EVB</scope></search><sort><creationdate>20020918</creationdate><title>DIGITAL CIRCUIT DEVICE, AND METHOD OF TESTING SEMICONDUCTOR DEVICE</title><author>INUDOU KOUSUKE ; HAYASHI YOSHIHIKO ; ORIHASHI RITSURO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2002267725A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2002</creationdate><topic>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>PULSE TECHNIQUE</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>INUDOU KOUSUKE</creatorcontrib><creatorcontrib>HAYASHI YOSHIHIKO</creatorcontrib><creatorcontrib>ORIHASHI RITSURO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>INUDOU KOUSUKE</au><au>HAYASHI YOSHIHIKO</au><au>ORIHASHI RITSURO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DIGITAL CIRCUIT DEVICE, AND METHOD OF TESTING SEMICONDUCTOR DEVICE</title><date>2002-09-18</date><risdate>2002</risdate><abstract>PROBLEM TO BE SOLVED: To precisely conduct clock distribution even when delay time fluctuation is generated cauded by fluctuation of a device operation condition, in a digital circuit device. SOLUTION: In this digital circuit device, the delay time fluctuation accompanied to the fluctuation of the device operation condition is corrected by circuit parts 10A-10C for measuring delay times in delay circuits 1A-1C for phase shift regulation, operation circuits B (11A-C) for computing fluctuation ratios based on measured values, and operation circuits A (12A-C) provided in the respective delay circuits to calculate fluctuation amounts based on the fluctuation ratios.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS PULSE TECHNIQUE TESTING |
title | DIGITAL CIRCUIT DEVICE, AND METHOD OF TESTING SEMICONDUCTOR DEVICE |
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