DIGITAL CIRCUIT DEVICE, AND METHOD OF TESTING SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To precisely conduct clock distribution even when delay time fluctuation is generated cauded by fluctuation of a device operation condition, in a digital circuit device. SOLUTION: In this digital circuit device, the delay time fluctuation accompanied to the fluctuation of the d...

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Bibliographische Detailangaben
Hauptverfasser: INUDOU KOUSUKE, HAYASHI YOSHIHIKO, ORIHASHI RITSURO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To precisely conduct clock distribution even when delay time fluctuation is generated cauded by fluctuation of a device operation condition, in a digital circuit device. SOLUTION: In this digital circuit device, the delay time fluctuation accompanied to the fluctuation of the device operation condition is corrected by circuit parts 10A-10C for measuring delay times in delay circuits 1A-1C for phase shift regulation, operation circuits B (11A-C) for computing fluctuation ratios based on measured values, and operation circuits A (12A-C) provided in the respective delay circuits to calculate fluctuation amounts based on the fluctuation ratios.