PACKET SWITCH

PROBLEM TO BE SOLVED: To provide a packet switch wherein the high-speed switchings of variable-length packets are made possible and the multi-casts whereby its buffer memory can be utilized effectively are made possible. SOLUTION: In the packet switch in whose structure respective variable- length p...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: TAKAHASHI MASAMI, OZAKI NAOHIKO, OGINUMA YASUO, MAKIMOTO AKIO, SUGANO TAKAYUKI
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a packet switch wherein the high-speed switchings of variable-length packets are made possible and the multi-casts whereby its buffer memory can be utilized effectively are made possible. SOLUTION: In the packet switch in whose structure respective variable- length packets received from respective input circuits LI are written into a common buffer memory 22 by multiplexing them by using their fixed-length data blocks as a multiplexing unit, when writing the data blocks, a buffer controlling portion 30 forms respective input queues to the individual input circuits that at the time point whereat the final data blocks of the variable- length packets are registered in the input queues, the linked-address lists of the input queues are linked to one or more output queues corresponding to the transfer-destination output circuits of the packets.