METHOD FOR STRUCTURALLY INCREASING MECHANICAL PERFORMANCE OF SILICON LEVEL INTERCONNECTING FILM

METHOD FOR STRUCTURALLY INCREASING MECHANICAL PERFORMANCE OF SILICON LEVEL INTERCONNECTING FILM

PROBLEM TO BE SOLVED: To provide a method for preventing micro cracks of an inter level dielectric caused from a stress applied to a bonding pad when bonding in a process of semiconductor. SOLUTION: The inner level dielectric IL3 between metal layers Mn, Mn-1 is strengthened by a conductive via patt...

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Bibliographische Detailangaben
Hauptverfasser: RINCON REYNALDO, SUNDARARAMAN VISWANATHAN, HOTCHKISS GREGORY B, EDWARDS DARVIN R, CHISHOLM MICHAEL F
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
LAYERED PRODUCTS
LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
PERFORMING OPERATIONS
SEMICONDUCTOR DEVICES
TRANSPORTING
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a method for preventing micro cracks of an inter level dielectric caused from a stress applied to a bonding pad when bonding in a process of semiconductor. SOLUTION: The inner level dielectric IL3 between metal layers Mn, Mn-1 is strengthened by a conductive via pattern 110 between the metal interconnecting layer Mn in a region of the bonding pad and the lower metal interconnecting layer Mn-1. The conductive via layer 110 includes, for example, a grid of a parallel rail or a cross hatch rail. The conductive via layer 110 prevents the micro crack caused from the stress applied to the bonding pad 112 by dispersing the stress concentration laterally.