DAMASCENE WIRING FORMATION METHOD OF SEMICONDUCTOR DEVICE AND DAMASCENE WIRING STRUCTURE FORMED THEREBY

PROBLEM TO BE SOLVED: To provide a damascene wiring formation method having a seed layer with superior step coverage characteristics, and a structure formed by the method. SOLUTION: Patterning is carried out for forming an opening after an insulating film is formed on a semiconductor substrate. A ba...

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Hauptverfasser: CHOI SEUNG-MAN, RI GENTOKU, BOKU KITETSU
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a damascene wiring formation method having a seed layer with superior step coverage characteristics, and a structure formed by the method. SOLUTION: Patterning is carried out for forming an opening after an insulating film is formed on a semiconductor substrate. A barrier film is formed on the entire surface of the resultant object where the opening is formed. The seed layer is formed on the side wall of the opening where at least a barrier film is formed, and on the upper surface of the insulating film by an ionization PVD device having a chuck that is subjected to RF bias application for accelerating a target where power for plasma formation is applied and an ion. When the seed layer is formed by an ionization PVD process, the power for plasma formation and RF bias are adjusted, and an initial seed layer where the bottom of the opening is formed is resputtered for depositing onto the side wall of the opening, thus forming the seed layer with the superior side-wall step coverage characteristics. Also, the barrier film on the bottom of the opening is selectively eliminated for reducing contact resistance.