LOW OPERATIONAL POWER, LOW LEAKAGE POWER D-TYPE FLIP FLOP
PROBLEM TO BE SOLVED: To provide a flip flop which operates to reduce leakage power consumption of an electronic circuit. SOLUTION: The flip flop has a sleep mode to reduce power consumption, and comprises a clock input, data input, input stage, input gate, output stage and output clamp. The input g...
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Zusammenfassung: | PROBLEM TO BE SOLVED: To provide a flip flop which operates to reduce leakage power consumption of an electronic circuit. SOLUTION: The flip flop has a sleep mode to reduce power consumption, and comprises a clock input, data input, input stage, input gate, output stage and output clamp. The input gate is interposed between the data input and input stage, and in the sleep mode, operates to isolate the input stage from the data input. The output stage is coupled to the input stage, and includes an output having a first output stage and second output state. The output clamp operates in the sleep mode to set the output stage in a predetermined state regardless of the data states at the data input and clock input. The predetermined state is one of the output states in which the leakage power consumption of the flip flop is less than in the other of the output states. |
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