SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To provide a technique by which the retention time of the memory cell of a DRAM can be improved by suppressing the punch through phenomenon of a MISFET constituting the memory cell, etc., of the DRAM. SOLUTION: A threshold adjusting impurity region SA3 is formed in a semiconduc...

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Bibliographische Detailangaben
Hauptverfasser: KUJIRAI YUTAKA, SHIGENIWA MASAHIRO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a technique by which the retention time of the memory cell of a DRAM can be improved by suppressing the punch through phenomenon of a MISFET constituting the memory cell, etc., of the DRAM. SOLUTION: A threshold adjusting impurity region SA3 is formed in a semiconductor substrate under the p-type gate electrode 9p of the MISFET Qs for information transfer of the DRAM through implanting, for example, of BF ions into the region. In addition, a punch through preventive region PA is formed in the semiconductor substrate at a position deeper than the region SA3, so as to cover the end sections of the source and drain of the MISFET Qs by implanting ions of an impurity, for example, In which are atoms heavier than those of the threshold adjusting impurity has into the region.