METHOD FOR FORMING ALIGNMENT FEATURE IN MULTILAYER SEMICONDUCTOR STRUCTURE OR ON MULTILAYER SEMICONDUCTOR STRUCTURE

PROBLEM TO BE SOLVED: To provide a method capable of using by forming an alignment feature in a multilayer semiconductor structure or on the multilayer semiconductor structure and connecting the feature to an SCALPEL tool. SOLUTION: A method for forming a multilayer semiconductor structure has the alignment feature to match a lithography mask and capable of using together with the SCALPEL tool. The method is particularly suitable for submicron CMOS technical device and circuit, but not limited only to them. The method is advantageous since the method can use an electron beam source in both matching and exposing the lithography mask on a semiconductor wafer. The method is advantageous since the alignment feature can be formed at an early stage (that is, a zero level) in a step of manufacturing a semiconductor device.