LEVEL CONVERTER

PROBLEM TO BE SOLVED: To provide a level converter capable of rapidly level converting an ECL level input signal to a CMOS operable output signal, being used even at a power source potential difference of a wide range and preventing a saturation of an output amplitude. SOLUTION: An ECL level signal...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: OGATA SHIGEYUKI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a level converter capable of rapidly level converting an ECL level input signal to a CMOS operable output signal, being used even at a power source potential difference of a wide range and preventing a saturation of an output amplitude. SOLUTION: An ECL level signal is level shifted by transistors Q107 and Q108 and resistors R104 and R105, high levels of base potential inputs of transistors Q101 and Q102 are doubled from a voltage (VBE) between a base and an emitter of the transistor to prevent saturations of the transistors Q101 and Q102, a voltage drop occurring at a resistor R103 is generated at a resistor R102, and an emitter potential of a transistor Q103 is output so that the high level becomes a lower voltage by the VBE from a high potential power source and the low level becomes a higher voltage by the VBE from a low potential power source.