SYNCHRONOUS CLOCK GENERATOR AND IMAGE FORMING DEVICE

PROBLEM TO BE SOLVED: To flexibly cope with the subsequent set up hold to which a synchronous clock signal and synchronous image data are supplied. SOLUTION: A first clock selecting part 4 inputs a BD signal to generate a first synchronous clock signal SCK1 which is synchronous with the BD signal. A...

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Bibliographische Detailangaben
1. Verfasser:	IZEKI MASAMI
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING CINEMATOGRAPHY COMPUTING CORRECTION OF TYPOGRAPHICAL ERRORS COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTROGRAPHY ELECTROPHOTOGRAPHY HOLOGRAPHY i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME LINING MACHINES MAGNETOGRAPHY PERFORMING OPERATIONS PHOTOGRAPHY PHYSICS PRINTING SELECTIVE PRINTING MECHANISMS STAMPS TRANSPORTING TYPEWRITERS
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Beschreibung
Zusammenfassung:	PROBLEM TO BE SOLVED: To flexibly cope with the subsequent set up hold to which a synchronous clock signal and synchronous image data are supplied. SOLUTION: A first clock selecting part 4 inputs a BD signal to generate a first synchronous clock signal SCK1 which is synchronous with the BD signal. A second synchronous clock signal generating part 5 generates a second synchronous clock signal SCK2 which is controlled to have a predetermined phase deference from the first signal SCK1 based on a selection signal RP. The predetermined phase difference can be selected for each 1/N (N is natural number) of a cycle of the first synchronous clock signal SCK1. An SW6 supplies an FIFO7 with the first synchronous clock signal SCK1 or second synchronous clock signal SCK2 as a read clock. Image data Do is read according to the read clock.