PHASE-LOCKED STATE DETERIORATION AND INFORMATION PROCESSING UNIT

PROBLEM TO BE SOLVED: To provide a phase-locked state detector that accurately detects, whether a phase lock state is eliminated in each information processing unit and minimizes interruption of information processing, even if initializing processing of a path is started during execution of the info...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MATSUMARU MAKOTO, MINOJIMA KUNIHIRO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a phase-locked state detector that accurately detects, whether a phase lock state is eliminated in each information processing unit and minimizes interruption of information processing, even if initializing processing of a path is started during execution of the information processing, such as reproduction processing. SOLUTION: A lock detection section is provided with a comparison section 17, that compares a phase of a processing clock signal Smc used for information processing generated by a phase-licked loop with a phase of a reference clock signal Src, an edge counter 18 that detects the change in the frequency of the processing clock signal Smc, and a CPU 19 that decides whether the processing clock signal Smc is a phase-locked state to the reference clock signal Src, on the basis of the phase comparison result and decides whether the phase lock state is eliminated, on the basis of the detection result in a frequency change.