PLL SEMICONDUCTOR DEVICE, AND TESTING METHOD AND DEVICE THEREFOR

PROBLEM TO BE SOLVED: To shorten the required time for test, and to reduce the testing cost by further easily testing a PLL semiconductor device including a voltage control oscillator and a frequency divider. SOLUTION: Not only the voltage control oscillator 10A but also an R frequency divider 21, a...

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description PROBLEM TO BE SOLVED: To shorten the required time for test, and to reduce the testing cost by further easily testing a PLL semiconductor device including a voltage control oscillator and a frequency divider. SOLUTION: Not only the voltage control oscillator 10A but also an R frequency divider 21, a (PN+A) frequency divider 22 capable of varying a value of A, a phase comparator 23 and a charge pump 24 are formed in the PLL semiconductor device 20. A low-pass filter 25 confirmed in having a standard characteristic is externally attached to this PLL semiconductor device to constitute a PLL circuit of a testing object. The (PN+A) frequency divider 22 is a pulse swallow system, and the input end for setting the value of A to a value before and after user ordinary use time is connected to an external terminal of the PLL semiconductor device 20 for simplifying a test. A dividing value of the frequency divider 22 is set to the value before and after the use time to check whether or not the PLL circuit synchronously oscillates in a prescribed time to judge the quality of the PLL semiconductor device 20.
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SOLUTION: Not only the voltage control oscillator 10A but also an R frequency divider 21, a (PN+A) frequency divider 22 capable of varying a value of A, a phase comparator 23 and a charge pump 24 are formed in the PLL semiconductor device 20. A low-pass filter 25 confirmed in having a standard characteristic is externally attached to this PLL semiconductor device to constitute a PLL circuit of a testing object. The (PN+A) frequency divider 22 is a pulse swallow system, and the input end for setting the value of A to a value before and after user ordinary use time is connected to an external terminal of the PLL semiconductor device 20 for simplifying a test. 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subjects AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
title PLL SEMICONDUCTOR DEVICE, AND TESTING METHOD AND DEVICE THEREFOR
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