MARK AND METHOD FOR OVERLAY MEASUREMENT AND SEMICONDUCTOR DEVICE HAVING THE MARK

PROBLEM TO BE SOLVED: To provide an overlay measurement mark which is composed of the pattern of an alignment layer and the pattern of one base layer and with which the overlay accuracy of the alignment layer with a plurality of different base layers can be measured simultaneously. SOLUTION: This ov...

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1. Verfasser: SHIMIZU TADAYOSHI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide an overlay measurement mark which is composed of the pattern of an alignment layer and the pattern of one base layer and with which the overlay accuracy of the alignment layer with a plurality of different base layers can be measured simultaneously. SOLUTION: This overlay measurement mark is constituted of a pattern 1 of the alignment layer and patterns 2, 3, 4, and 5 of a plurality of different base layers I, J, K, and L so that the overlay accuracy of the alignment layer with the base layers I, J, K, and L may be measured simultaneously by using a single mark. Consequently, the measuring time of the overlay accuracy can be shortened and the occupying area of the mark can be reduced.