METHOD FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT
PROBLEM TO BE SOLVED: To provide a method for designing a semiconductor integrated circuit which can prevent transmission speed of a signal from being slow. SOLUTION: A method for designing a semiconductor integrated circuit comprises a step of inserting several dummy equivalence terminals between a...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PROBLEM TO BE SOLVED: To provide a method for designing a semiconductor integrated circuit which can prevent transmission speed of a signal from being slow. SOLUTION: A method for designing a semiconductor integrated circuit comprises a step of inserting several dummy equivalence terminals between an input or an output terminal of macro-block and a logic cell inside a macro- block connected to the input or the output of the macro-block, a step of eliminating a dummy equivalence terminal which is remained and needless when a macro-block which arranges the dummy equivalence terminal on plural sides of the macro-block is used, and the only dummy equivalence terminal among several dummy equivalence terminals of the macro-block is used for wiring of an automatic layout with chip level in the automatic layout. |
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